Commit d775a2bd authored by Andrei Tosa's avatar Andrei Tosa
Browse files

Added optimizations to kernel

parent d8c3acf7
<?xml version="1.0" encoding="UTF-8"?>
<autopilotfilemapping:AutoPilotFileMapping xmlns:autopilotfilemapping="www.autoesl.com/autopilotfilemapping">
<source>
<originFiles name="defines.hpp" path="/home/atosa/Documents/RandomGen/src/defines.hpp"/>
<originFiles name="rndgen.cpp" path="/home/atosa/Documents/RandomGen/src/rndgen.cpp"/>
</source>
<testbench/>
</autopilotfilemapping:AutoPilotFileMapping>
This diff is collapsed.
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>HLS_PROJ</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.autoesl.autopilot.ui.AutopilotNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
<link>
<name>source</name>
<type>2</type>
<location>/home/atosa/Documents/RandomGen/HLS_PROJ/.apc/.src</location>
</link>
<link>
<name>testbench</name>
<type>2</type>
<location>/home/atosa/Documents/RandomGen/HLS_PROJ/.apc/.tb</location>
</link>
<link>
<name>solution1/constraints</name>
<type>2</type>
<location>/home/atosa/Documents/RandomGen/HLS_PROJ/solution1/.tcls</location>
</link>
<link>
<name>source/defines.hpp</name>
<type>1</type>
<location>/home/atosa/Documents/RandomGen/src/defines.hpp</location>
</link>
<link>
<name>source/rndgen.cpp</name>
<type>1</type>
<location>/home/atosa/Documents/RandomGen/src/rndgen.cpp</location>
</link>
<link>
<name>solution1/constraints/.xml.directive</name>
<type>1</type>
<location>/home/atosa/Documents/RandomGen/HLS_PROJ/solution1/solution1.directive</location>
</link>
<link>
<name>solution1/constraints/directives.tcl</name>
<type>1</type>
<location>/home/atosa/Documents/RandomGen/HLS_PROJ/solution1/directives.tcl</location>
</link>
<link>
<name>solution1/constraints/script.tcl</name>
<type>1</type>
<location>/home/atosa/Documents/RandomGen/HLS_PROJ/solution1/script.tcl</location>
</link>
</linkedResources>
</projectDescription>
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.launch.applicationLaunchType">
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/a.out"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="HLS_PROJ"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1150140994"/>
<stringAttribute key="org.eclipse.cdt.launch.WORKING_DIRECTORY" value="/home/atosa/Documents/RandomGen/HLS_PROJ"/>
<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/>
<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;sourceLookupDirector&gt;&#10; &lt;sourceContainers duplicates=&quot;false&quot;&gt;&#10; &lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#10;&amp;lt;default/&amp;gt;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#10; &lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#10;&amp;lt;directory nest=&amp;quot;true&amp;quot; path=&amp;quot;/opt/Xilinx/Vivado/2020.1/lnx64/tools/systemc&amp;quot;/&amp;gt;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.directory&quot;/&gt;&#10; &lt;/sourceContainers&gt;&#10;&lt;/sourceLookupDirector&gt;&#10;"/>
</launchConfiguration>
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.launch.applicationLaunchType">
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Release/a.out"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="HLS_PROJ"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.release.1446245161"/>
<stringAttribute key="org.eclipse.cdt.launch.WORKING_DIRECTORY" value="/home/atosa/Documents/RandomGen/HLS_PROJ"/>
<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/>
<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;sourceLookupDirector&gt;&#10; &lt;sourceContainers duplicates=&quot;false&quot;&gt;&#10; &lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#10;&amp;lt;default/&amp;gt;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#10; &lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#10;&amp;lt;directory nest=&amp;quot;true&amp;quot; path=&amp;quot;/opt/Xilinx/Vivado/2020.1/lnx64/tools/systemc&amp;quot;/&amp;gt;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.directory&quot;/&gt;&#10; &lt;/sourceContainers&gt;&#10;&lt;/sourceLookupDirector&gt;&#10;"/>
</launchConfiguration>
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="cdt.managedbuild.config.gnu.exe.debug.1150140994" name="Debug">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-922300797357148031" id="org.eclipse.cdt.managedbuilder.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
</extension>
</configuration>
<configuration id="cdt.managedbuild.config.gnu.exe.release.1446245161" name="Release">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-922300797357148031" id="org.eclipse.cdt.managedbuilder.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
</extension>
</configuration>
</project>
<?xml version="1.0" encoding="UTF-8"?>
<vivadoHLSLog:LogRoot xmlns:vivadoHLSLog="www.xilinx.com/vivadoHLSLog">
<errorLogs>
<logs>
<synLog/>
<simLog/>
<mgLog/>
<packageLog/>
<csimLog/>
</logs>
</errorLogs>
<warningLogs>
<logs>
<synLog>
<logs message="WARNING: [SYN 201-107] Renaming port name 'rndgen/out' to 'rndgen/out_r' to avoid the conflict with HDL keywords or other object names." projectName="HLS_PROJ" solutionName="solution1" date="2020-07-30T12:56:57.101+0200" type="Warning"/>
<logs message="WARNING: [SYNCHK 200-23] src/rndgen.cpp:25: variable-indexed range selection may cause suboptimal QoR." projectName="HLS_PROJ" solutionName="solution1" date="2020-07-30T12:56:56.954+0200" type="Warning"/>
</synLog>
<simLog/>
<mgLog/>
<packageLog/>
<csimLog/>
</logs>
</warningLogs>
</vivadoHLSLog:LogRoot>
<?xml version="1.0" encoding="utf-8"?>
<Messages>
<Message severity="INFO" prefix="[SCHED 204-61]" key="SCHED_PIPELINING_STATUS_631" tag="SCHEDULE" content="Option &apos;relax_ii_for_timing&apos; is enabled, will increase II to preserve clock frequency constraints."/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1312" tag="" content="Analyzing design file &apos;src/rndgen.cpp&apos; ..."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished Linking Time (s): cpu = 00:00:11 ; elapsed = 00:00:10 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11798 ; free virtual = 26453"/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished Checking Pragmas Time (s): cpu = 00:00:11 ; elapsed = 00:00:10 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11798 ; free virtual = 26453"/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1467" tag="" content="Starting code transformations ..."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished Standard Transforms Time (s): cpu = 00:00:11 ; elapsed = 00:00:11 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11797 ; free virtual = 26452"/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1472" tag="" content="Checking synthesizability ..."/>
<Message severity="WARNING" prefix="[SYNCHK 200-23]" key="SYNCHK_VAR_INDEX_RANGE_359" tag="" content="src/rndgen.cpp:25: variable-indexed range selection may cause suboptimal QoR."/>
<Message severity="INFO" prefix="[SYNCHK 200-10]" key="SYNCHK_SYNCHK_SUMMARY_377" tag="" content="0 error(s), 1 warning(s)."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished Checking Synthesizability Time (s): cpu = 00:00:11 ; elapsed = 00:00:11 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11797 ; free virtual = 26452"/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished Pre-synthesis Time (s): cpu = 00:00:12 ; elapsed = 00:00:11 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11778 ; free virtual = 26433"/>
<Message severity="INFO" prefix="[HLS 200-444]" key="HLS 200-444" tag="AXI,SDX_AXI" content="Inferring multiple bus burst write of variable length on port &apos;gmem&apos; (src/rndgen.cpp:32:12). These data requests might be further partitioned to multiple requests during RTL generation, based on max_read_burst_length or max_write_burst_length settings."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished Architecture Synthesis Time (s): cpu = 00:00:12 ; elapsed = 00:00:11 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11778 ; free virtual = 26433"/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1317" tag="" content="Starting hardware synthesis ..."/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1385" tag="" content="Synthesizing &apos;rndgen&apos; ..."/>
<Message severity="WARNING" prefix="[SYN 201-107]" key="SYN_PORT_NAME_ILLEGAL_593" tag="" content="Renaming port name &apos;rndgen/out&apos; to &apos;rndgen/out_r&apos; to avoid the conflict with HDL keywords or other object names."/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1477" tag="" content="----------------------------------------------------------------"/>
<Message severity="INFO" prefix="[HLS 200-42]" key="HLS_42_1438" tag="" content="-- Implementing module &apos;rndgen&apos;"/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1478" tag="" content="----------------------------------------------------------------"/>
<Message severity="INFO" prefix="[SCHED 204-11]" key="SCHED_SCHED_STATUS_597" tag="" content="Starting scheduling ..."/>
<Message severity="INFO" prefix="[SCHED 204-11]" key="SCHED_SCHED_STATUS_596" tag="" content="Finished scheduling."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_966" tag="" content=" Elapsed time: 11.18 seconds; current allocated memory: 130.890 MB."/>
<Message severity="INFO" prefix="[BIND 205-100]" key="BIND_100_926" tag="" content="Starting micro-architecture generation ..."/>
<Message severity="INFO" prefix="[BIND 205-101]" key="BIND_101_698" tag="" content="Performing variable lifetime analysis."/>
<Message severity="INFO" prefix="[BIND 205-101]" key="BIND_101_697" tag="" content="Exploring resource sharing."/>
<Message severity="INFO" prefix="[BIND 205-101]" key="BIND_101_693" tag="" content="Binding ..."/>
<Message severity="INFO" prefix="[BIND 205-100]" key="BIND_100_925" tag="" content="Finished micro-architecture generation."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_966" tag="" content=" Elapsed time: 0.01 seconds; current allocated memory: 131.177 MB."/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1483" tag="" content="----------------------------------------------------------------"/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1484" tag="" content="-- Generating RTL for module &apos;rndgen&apos;"/>
<Message severity="INFO" prefix="[HLS 200-10]" key="HLS_10_1485" tag="" content="----------------------------------------------------------------"/>
<Message severity="INFO" prefix="[RTGEN 206-500]" key="PREPROC_IO_COMP_CONFLICT_1950" tag="" content="Setting interface mode on port &apos;rndgen/gmem&apos; to &apos;m_axi&apos;."/>
<Message severity="INFO" prefix="[RTGEN 206-500]" key="PREPROC_IO_COMP_CONFLICT_1950" tag="" content="Setting interface mode on port &apos;rndgen/seed&apos; to &apos;s_axilite &amp; ap_none&apos;."/>
<Message severity="INFO" prefix="[RTGEN 206-500]" key="PREPROC_IO_COMP_CONFLICT_1950" tag="" content="Setting interface mode on port &apos;rndgen/count&apos; to &apos;ap_none&apos;."/>
<Message severity="INFO" prefix="[RTGEN 206-500]" key="PREPROC_IO_COMP_CONFLICT_1950" tag="" content="Setting interface mode on port &apos;rndgen/out_r&apos; to &apos;s_axilite &amp; ap_none&apos;."/>
<Message severity="INFO" prefix="[RTGEN 206-500]" key="PREPROC_IO_COMP_CONFLICT_1950" tag="" content="Setting interface mode on function &apos;rndgen&apos; to &apos;s_axilite &amp; ap_ctrl_hs&apos;."/>
<Message severity="INFO" prefix="[RTGEN 206-100]" key="RTGEN_100_851" tag="" content="Bundling port &apos;return&apos;, &apos;seed&apos; and &apos;out_r&apos; to AXI-Lite port control."/>
<Message severity="INFO" prefix="[RTGEN 206-100]" key="RTGEN_100_856" tag="" content="Finished creating RTL model for &apos;rndgen&apos;."/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_966" tag="" content=" Elapsed time: 0.04 seconds; current allocated memory: 132.067 MB."/>
<Message severity="INFO" prefix="[HLS 200-790]" key="HLS 200-790" tag="LOOP,SDX_LOOP" content="**** Loop Constraint Status: All loop constraints were satisfied."/>
<Message severity="INFO" prefix="[HLS 200-789]" key="HLS 200-789" tag="THROUGHPUT,SDX_KERNEL" content="**** Estimated Fmax: 346.32 MHz"/>
<Message severity="INFO" prefix="[HLS 200-111]" key="HLS_111_965" tag="" content="Finished generating all RTL models Time (s): cpu = 00:00:12 ; elapsed = 00:00:12 . Memory (MB): peak = 1597.148 ; gain = 1163.754 ; free physical = 11769 ; free virtual = 26426"/>
<Message severity="INFO" prefix="[VHDL 208-304]" key="VHDL_304_1066" tag="" content="Generating VHDL RTL for rndgen."/>
<Message severity="INFO" prefix="[VLOG 209-307]" key="VLOG_307_1067" tag="" content="Generating Verilog RTL for rndgen."/>
</Messages>
<InterfaceSummary>
<RtlPorts>
<name>gmem</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>seed</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>count</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
</InterfaceSummary>
#!/bin/sh
lli=${LLVMINTERP-lli}
exec $lli \
/home/atosa/Documents/RandomGen/HLS_PROJ/solution1/.autopilot/db/a.g.bc ${1+"$@"}
#!/bin/sh
lli=${LLVMINTERP-lli}
exec $lli \
/home/atosa/Documents/RandomGen/HLS_PROJ/solution1/.autopilot/db/a.g.0.bc ${1+"$@"}
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