Commit 3ea992f4 authored by Zsolt István's avatar Zsolt István
Browse files

HACK to reduce latency by adding a word of zeros after the end of a packet,...

HACK to reduce latency by adding a word of zeros after the end of a packet, unless there is an immediate data word following it
parent 8aac7c42
......@@ -346,9 +346,6 @@ module muu_TopWrapper #(
reg is_first_output_cycle;
reg [31:0] myClock;
wire clk;
assign clk = aclk;
assign m_axis_listen_port_TDATA = axis_listen_port_data;
......@@ -357,7 +354,7 @@ module muu_TopWrapper #(
reg [15:0] min_port;
reg [15:0] max_port;
//open up server port (2888)
always @(posedge clk)
always @(posedge aclk)
begin
reset <= !aresetn;
......@@ -391,7 +388,7 @@ module muu_TopWrapper #(
.DATA_SIZE(65),
.ADDR_BITS(5)
) input_firstword_fifo_inst (
.clk(clk),
.clk(aclk),
.rst(reset),
.s_axis_tvalid(s_axis_rx_data_TVALID),
.s_axis_tready(s_axis_rx_data_TREADY),
......@@ -411,7 +408,7 @@ module muu_TopWrapper #(
muu_session_Top #(
.USER_BITS(USER_BITS)
) muuSessionMngr (
.clk(clk),
.clk(aclk),
.rst(reset),
.rstn(aresetn),
......@@ -450,7 +447,7 @@ module muu_TopWrapper #(
.DATA_SIZE(129+USER_BITS),
.ADDR_BITS(6)
) fifo_splitprepare (
.clk(clk),
.clk(aclk),
.rst(reset),
.s_axis_tvalid(splitPreValid),
.s_axis_tready(splitPreReady),
......@@ -498,13 +495,15 @@ module muu_TopWrapper #(
assign ht_dramWrData_data = syncMode==1? mem_write_data : ht_dramWrData_data_r;
assign ht_dramWrData_valid = syncMode==1 ? mem_write_valid : ht_dramWrData_valid_r;
reg injectValid;
reg[127:0] injectWord;
muu_Top_Module_Repl
#(
.IS_SIM(IS_SIM),
.USER_BITS(USER_BITS)
) muukvs_instance (
.clk(clk),
.clk(aclk),
.rst(reset),
.s_axis_tvalid(splitInValid),
.s_axis_tready(splitInReady),
......@@ -598,17 +597,32 @@ module muu_TopWrapper #(
);
// .S00_AXIS_TDATA({fromKvsData[63:0],fromKvsData[127:64]}),
always @(posedge aclk) begin
if(reset) begin
injectValid <= 0;
end else begin
if ((injectValid==1 && fromKvsReady==1) || fromKvsValid==1) begin
injectValid <= 0;
end
if (injectValid==0 && fromKvsValid==1 && fromKvsReady==1 && fromKvsLast==1) begin
injectValid <= 1;
injectWord <= {fromKvsData[127:64],64'd0};
end
end
end
nukv_fifogen #(
.DATA_SIZE(128+1),
.ADDR_BITS(4)
) fifo_lastbeforeout (
.clk(clk),
.clk(aclk),
.rst(reset),
.s_axis_tvalid(fromKvsValid),
.s_axis_tvalid(fromKvsValid | injectValid),
.s_axis_tready(fromKvsReady),
.s_axis_tdata({fromKvsLast,fromKvsData}),
.s_axis_tdata((injectValid==1 && fromKvsValid==0) ? {1'b1,injectWord} : {fromKvsLast,fromKvsData}),
.m_axis_tvalid(finalOutValid),
.m_axis_tready(finalOutReady),
.m_axis_tdata({finalOutLast,finalOutData})
......@@ -624,14 +638,14 @@ module muu_TopWrapper #(
//assign timerReady = is_first_output_cycle & finalOutValid & finalOutReady;
always @(posedge clk)
always @(posedge aclk)
begin
if (aresetn == 0) begin
is_first_output_cycle <= 1;
m_axis_tx_metadata_TVALID <= 0;
end
else begin
if (m_axis_tx_data_TVALID==1 && m_axis_tx_data_TREADY==1 && m_axis_tx_metadata_TREADY==1 && is_first_output_cycle==1) begin
if (finalOutValid==1 && finalOutReady==1 && is_first_output_cycle==1) begin
m_axis_tx_metadata_TVALID <= 1;
m_axis_tx_metadata_TDATA <= finalOutData[64 +: 16];
is_first_output_cycle <= 0;
......@@ -641,7 +655,7 @@ module muu_TopWrapper #(
m_axis_tx_metadata_TVALID <= 0;
end
if (m_axis_tx_data_TVALID==1 && m_axis_tx_data_TREADY==1 && m_axis_tx_data_TLAST==1) begin
if (finalOutValid==1 && finalOutReady==1 && finalOutLast==1) begin
is_first_output_cycle <= 1;
end
end
......@@ -656,7 +670,7 @@ module muu_TopWrapper #(
reg [31:0] position_consumed;
always @(posedge clk)
always @(posedge aclk)
begin
if (aresetn == 0) begin
dbg_capture_count <= 0;
......
......@@ -497,13 +497,13 @@ wire regSessionCount_V_vld;
wire [161:0] debug_out;
tcp_ip_wrapper #(
network_stack #(
//tcp_ip_wrapper #(
.MAC_ADDRESS (48'hE59D02350A00), //bytes reversed
.IP_ADDRESS (32'hD1D4010A), //reverse
//.IP_ADDRESS (32'hD1D4010A), //reverse
.IP_SUBNET_MASK (32'h00FFFFFF), //reverse
.IP_DEFAULT_GATEWAY (32'h01D4010A), //reverse
.DHCP_EN (0)
.IP_DEFAULT_GATEWAY (32'h01D4010A) //reverse
//.DHCP_EN (0)
)
tcp_ip_inst (
.aclk (axi_clk),
......@@ -522,6 +522,7 @@ tcp_ip_inst (
.AXI_S_Stream_TKEEP (AXI_S_Stream_TKEEP),
.AXI_S_Stream_TLAST (AXI_S_Stream_TLAST),
/*
// memory rx cmd streams
.m_axis_rxread_cmd_TVALID (axis_rxread_cmd_TVALID),
.m_axis_rxread_cmd_TREADY (axis_rxread_cmd_TREADY),
......@@ -547,7 +548,7 @@ tcp_ip_inst (
.m_axis_rxwrite_data_TDATA (axis_rxwrite_data_TDATA),
.m_axis_rxwrite_data_TKEEP (axis_rxwrite_data_TKEEP),
.m_axis_rxwrite_data_TLAST (axis_rxwrite_data_TLAST),
*/
// memory tx cmd streams
.m_axis_txread_cmd_TVALID (axis_txread_cmd_TVALID),
.m_axis_txread_cmd_TREADY (axis_txread_cmd_TREADY),
......@@ -556,9 +557,9 @@ tcp_ip_inst (
.m_axis_txwrite_cmd_TREADY (axis_txwrite_cmd_TREADY),
.m_axis_txwrite_cmd_TDATA (axis_txwrite_cmd_TDATA),
// memory tx status streams
.s_axis_txread_sts_TVALID (axis_txread_sts_TVALID),
.s_axis_txread_sts_TREADY (axis_txread_sts_TREADY),
.s_axis_txread_sts_TDATA (axis_txread_sts_TDATA),
//.s_axis_txread_sts_TVALID (axis_txread_sts_TVALID),
//.s_axis_txread_sts_TREADY (axis_txread_sts_TREADY),
//.s_axis_txread_sts_TDATA (axis_txread_sts_TDATA),
.s_axis_txwrite_sts_TVALID (axis_txwrite_sts_TVALID),
.s_axis_txwrite_sts_TREADY (axis_txwrite_sts_TREADY),
.s_axis_txwrite_sts_TDATA (axis_txwrite_sts_TDATA),
......@@ -653,12 +654,13 @@ tcp_ip_inst (
.s_axis_udp_tx_length_tready(axis_udp_tx_length_tready),
.s_axis_udp_tx_length_tdata(axis_udp_tx_length_tdata),
*/
.ip_address_in(32'hD1D4010A),
.ip_address_out(ip_address),
.regSessionCount_V(regSessionCount_V),
.regSessionCount_V_ap_vld(regSessionCount_V_vld),
.debug_out(debug_out),
//.debug_out(debug_out),
.board_number(switch[3:0]),
.subnet_number(switch[5:4])
......@@ -1040,7 +1042,7 @@ assign axis_txwrite_cmd_TREADY = toeTX_s_axis_write_cmd_tready;
assign toeTX_s_axis_write_cmd_tdata = axis_txwrite_cmd_TDATA;
// memory sts streams
assign axis_txread_sts_TVALID = toeTX_m_axis_read_sts_tvalid;
assign toeTX_m_axis_read_sts_tready = axis_txread_sts_TREADY;
assign toeTX_m_axis_read_sts_tready = 1'b1;//axis_txread_sts_TREADY;
assign axis_txread_sts_TDATA = toeTX_m_axis_read_sts_tdata;
assign axis_txwrite_sts_TVALID = toeTX_m_axis_write_sts_tvalid;
assign toeTX_m_axis_write_sts_tready = axis_txwrite_sts_TREADY;
......
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