Commit f790292b authored by Claudiu Mihali's avatar Claudiu Mihali
Browse files

Bugfixes for hw decompression

parent b7dca4f6
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 08/16/2019 03:40:57 PM
// Design Name:
// Module Name: decompress_engine
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
`define LITERAL_TAG 2'b00
`define MATCH_1_TAG 2'b01
......@@ -26,7 +7,7 @@
module decompress_engine
#(
parameter DECOMPRESS_MODE_SIZE = 8,
parameter WORD_SIZE = 512,
parameter WORD_SIZE = 64,
parameter VALUE_SIZE_BYTES_NO = 2
)
(
......@@ -427,4 +408,4 @@ always @(posedge clk) begin
end
end
endmodule
\ No newline at end of file
endmodule
......@@ -9,39 +9,39 @@ module nukv_Rotation_Module
input wire clk,
input wire rst,
(* mark_debug = "true" *)input wire [COL_COUNT*COL_COUNT*COL_WIDTH-1:0] matrix_data,
(* mark_debug = "true" *)input wire matrix_valid,
(* mark_debug = "true" *)input wire [MEMORY_WIDTH-1:0] input_data,
(* mark_debug = "true" *)input wire input_valid,
(* mark_debug = "true" *)input wire input_last,
(* mark_debug = "true" *)output wire input_ready,
(* mark_debug = "true" *)output wire [MEMORY_WIDTH-1:0] output_data,
(* mark_debug = "true" *)output wire output_valid,
(* mark_debug = "true" *)output wire output_last,
(* mark_debug = "true" *)input wire output_ready
input wire [COL_COUNT*COL_COUNT*COL_WIDTH-1:0] matrix_data,
input wire matrix_valid,
input wire [MEMORY_WIDTH-1:0] input_data,
input wire input_valid,
input wire input_last,
output wire input_ready,
output wire [MEMORY_WIDTH-1:0] output_data,
output wire output_valid,
output wire output_last,
input wire output_ready
);
reg[2:0] state;
(* mark_debug = "true" *)wire [8*VALUE_SIZE_BYTES_NO-1:0] ctr_value_size_data;
(* mark_debug = "true" *)wire [COL_COUNT*COL_WIDTH-1:0] ctr_data;
(* mark_debug = "true" *)wire ctr_valid;
(* mark_debug = "true" *)wire ctr_ready;
(* mark_debug = "true" *)wire ctr_last;
wire [8*VALUE_SIZE_BYTES_NO-1:0] ctr_value_size_data;
wire [COL_COUNT*COL_WIDTH-1:0] ctr_data;
wire ctr_valid;
wire ctr_ready;
wire ctr_last;
(* mark_debug = "true" *)wire[COL_COUNT*COL_WIDTH-1:0] rot_data;
(* mark_debug = "true" *)wire rot_valid;
(* mark_debug = "true" *)wire rot_ready;
(* mark_debug = "true" *)wire rot_last;
(* mark_debug = "true" *)wire [8*VALUE_SIZE_BYTES_NO-1:0] rtc_value_size_data;
(* mark_debug = "true" *)wire [MEMORY_WIDTH-1:0] rtc_data;
(* mark_debug = "true" *)wire rtc_valid;
(* mark_debug = "true" *)wire rtc_ready;
(* mark_debug = "true" *)wire rtc_last;
wire[COL_COUNT*COL_WIDTH-1:0] rot_data;
wire rot_valid;
wire rot_ready;
wire rot_last;
wire [8*VALUE_SIZE_BYTES_NO-1:0] rtc_value_size_data;
wire [MEMORY_WIDTH-1:0] rtc_data;
wire rtc_valid;
wire rtc_ready;
wire rtc_last;
wire mult_valid;
......
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