Commit 7df25f3a authored by Zsolt István's avatar Zsolt István
Browse files

Worked on adding GetConditional back to the project. Could have bugs.

parent 7ff981d6
......@@ -43,10 +43,10 @@ Replicated commands are:
Node local commands are:
* Flush
* Get
* [ConditionalGet]
* ConditionalGet
* [Scan]
* SetLocal
* [DeleteLocal]
* DeleteLocal
* ConfigTenantLimits
Note: the operations in square brackets have buggy/incomplete behavior and are not to be used until further code updates.
......@@ -71,7 +71,7 @@ These operations are formatted as follows:
Legend:
* x [1B] = reserved to encode node id
* C [1B] = opcode: 0x01 for replicated SET, node-local command code: 0x00 for GET, 0x1F for SET-LOCAL, 0xFF for FLUSH
* C [1B] = opcode: 0x01 for replicated SET, node-local command code: 0x00 for GET, 0x1F for SET-LOCAL, 0x2F for DELETE-LOCAL, 0xFF for FLUSH, 0x40 for GET-CONDITIONAL
* P [2B] = payload (key + value) size in 64bit words. E.g. 4=4*64bit
* E [8B] = reserved to encode epoch, zxid
* K [64B] = key (can be only 64bit long)
......@@ -80,6 +80,20 @@ Legend:
In-code examples of these operations can be found in the Go client in /src/
#### Conditional gets
The FPGA can be confugured with one or multiple filters that can execute a condition on the value when retrieved. If the condition holds, the value is returned in full, otherwise an empty response is sent to the client. This allows for pushing down filtering operations into the storage.
A conditional get operation consists of a key and instead of a value, a bitvector that configures *all* processing elements on the node. These can be of various types, but the default ones are "byte comparisons". The bit vector is a concatenation of the configuration vector of each element, padded so that it is a multiple of 8Bs, with a maximum size of 64Bs.
The "byte comparators" have the following configuration bits:
Bit 0-11: Offset in the value (counting the 2Bs for length as well!)
Bit 12-15: Comparison function (0=equal, 1=smaller, 2=larger, 3=notequal).
Bit 16-47 (4 Bytes): Constant to compare to.
If there are 8 comparators, up to 8 x 48B can be provided in the configuration vector. An all zero bitvector disables the comparator, and internally the bitvector is padded with zeros.
### Tenant shares config
The Token Buckets can be configured for each tenant separately by piggybacking the information on a regular packet (e.g. on a GET). The tenant choice is implicit depending on what to which port the request is sent to.
......
......@@ -15,7 +15,6 @@
//-- along with this program. If not, see <http://www.gnu.org/licenses/>.
//---------------------------------------------------------------------------
module muu_HT_Read #(
parameter KEY_WIDTH = 128,
parameter META_WIDTH = 96,
......@@ -44,6 +43,7 @@ module muu_HT_Read #(
output reg rdcmd_valid,
input wire rdcmd_ready
);
`include "muu_ops.vh"
reg selectInputNext;
reg selectInput; //1 == input, 0==feedback
......@@ -132,7 +132,7 @@ module muu_HT_Read #(
state <= ST_ISSUE_READ_TWO;
output_data <= in_data;
if (in_data[KEY_WIDTH+META_WIDTH-8 +: 4]==0 || in_data[KEY_WIDTH+META_WIDTH-8 +: 4]==7) begin
if (in_data[KEY_WIDTH+META_WIDTH-8 +: 4]==HTOP_IGNORE || in_data[KEY_WIDTH+META_WIDTH-8 +: 4]==HTOP_IGNOREPROP) begin
// ignore this and don't send read!
in_ready <= 1;
state <= ST_OUTPUT_KEY;
......
......@@ -74,6 +74,8 @@ module muu_HT_Write #(
output reg [15:0] debug
);
`include "muu_ops.vh"
localparam [3:0]
ST_IDLE = 0,
......@@ -89,16 +91,7 @@ localparam [3:0]
ST_WIPE = 15;
reg [3:0] state;
localparam [3:0]
OP_IGNORE = 0,
OP_GET = 1,
OP_SETNEXT = 2,
OP_DELCUR = 3,
OP_FLIPPOINT = 4,
OP_SETCUR = 5,
OP_GETRAW = 6,
OP_IGNOREPROP = 7,
OP_FLUSH = 4'hF; //(truncated from 8'hFF)
reg [3:0] opmode;
wire op_needsmalloc;
......@@ -149,7 +142,7 @@ wire silent_resp;
assign silent_resp = (resp_opcode==8'h80) ? 1 : 0;
assign op_needsmalloc = (opmode==OP_SETNEXT || opmode==OP_SETCUR) ? 1 : 0;
assign op_needsmalloc = (opmode==HTOP_SETNEXT || opmode==HTOP_SETCUR) ? 1 : 0;
wire [3:0] curr_flags;
assign curr_flags = (state==ST_IDLE) ? input_data[KEY_WIDTH+META_WIDTH-4 +: 4] : inputReg[KEY_WIDTH+META_WIDTH-4 +: 4];
......@@ -346,15 +339,15 @@ always @(posedge clk) begin
empty_mem <= 0;
empty_ff <= 0;
if (curr_opcode!=OP_IGNORE && curr_opcode!=OP_IGNOREPROP) begin
if (curr_opcode!=HTOP_IGNORE && curr_opcode!=HTOP_IGNOREPROP) begin
inputValueSize <= input_data[KEY_WIDTH+64 +: 16];
end
if (curr_opcode == OP_IGNORE || curr_opcode == OP_IGNOREPROP) begin
if (curr_opcode == HTOP_IGNORE || curr_opcode == HTOP_IGNOREPROP) begin
state <= ST_SENDOUT;
end else if (curr_opcode == OP_FLUSH) begin
end else if (curr_opcode == HTOP_FLUSH) begin
state <= ST_WIPE;
free_valid <= 1;
......@@ -451,7 +444,7 @@ always @(posedge clk) begin
found_kk_pos <= pos_kk-1;
kicked_keys_found_reg <= kicked_keys_pos_reg;
if (op_retry==1 && (opmode==OP_SETNEXT || opmode==OP_SETCUR) && pos_kk==kk_tail+1) begin
if (op_retry==1 && (opmode==HTOP_SETNEXT || opmode==HTOP_SETCUR) && pos_kk==kk_tail+1) begin
oldpointer <= kicked_keys_pos_reg[KEY_WIDTH+31:KEY_WIDTH];
kk_cnt <= kk_cnt-1;
kk_tail <= kk_tail +1;
......@@ -641,7 +634,7 @@ always @(posedge clk) begin
case (opmode)
OP_GET : begin
HTOP_GET,HTOP_GETCOND : begin
output_valid <= 1;
output_data[0 +: KEY_WIDTH+META_WIDTH+USER_BITS] <= inputReg[0 +: KEY_WIDTH+META_WIDTH+USER_BITS];
......@@ -651,7 +644,7 @@ always @(posedge clk) begin
end
OP_SETNEXT,OP_SETCUR : begin
HTOP_SETNEXT,HTOP_SETCUR : begin
if (feedback_ready==1 && free_ready==1 && kk_cnt<2**FASTFORWARD_BITS-1) begin
......@@ -662,7 +655,7 @@ always @(posedge clk) begin
feedback_valid <= 1;
feedback_data <= {inputReg[KEY_WIDTH+META_WIDTH +: USER_BITS], {META_WIDTH{1'b0}},writebackEntry[0 +: KEY_WIDTH]};
feedback_data[KEY_WIDTH+META_WIDTH-8 +: 4] <= OP_SETCUR;
feedback_data[KEY_WIDTH+META_WIDTH-8 +: 4] <= HTOP_SETCUR;
feedback_data[KEY_WIDTH+META_WIDTH-4 +: 4] <= 4'b0100;
kicked_keys_write_data <= writebackEntry;
......@@ -675,12 +668,12 @@ always @(posedge clk) begin
if (writebackKeyMatch==1) begin
// this is the same key, look at pointers
if (opmode==OP_SETCUR && writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH]==0) begin
if (opmode==HTOP_SETCUR && writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH]==0) begin
//nothing prepared yet, put pointer there
writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH] <= {inputValueSize,mallocRegData};
end else if (opmode==OP_SETCUR && writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH]!=0) begin
end else if (opmode==HTOP_SETCUR && writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH]!=0) begin
//pointer location is taken...
writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH] <= {inputValueSize,mallocRegData};
......@@ -689,12 +682,12 @@ always @(posedge clk) begin
free_pointer <= writebackEntry[KEY_WIDTH +: 32];
free_size <= writebackEntry[KEY_WIDTH+32 +: 16];
end else if (opmode==OP_SETNEXT && writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH]==0) begin
end else if (opmode==HTOP_SETNEXT && writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH]==0) begin
//nothing prepared yet, put pointer there
writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH] <= {inputValueSize,mallocRegData};
end else if (opmode==OP_SETNEXT && writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH]!=0) begin
end else if (opmode==HTOP_SETNEXT && writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH]!=0) begin
//pointer location is taken...
writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH] <= {inputValueSize,mallocRegData};
......@@ -706,7 +699,7 @@ always @(posedge clk) begin
end else begin
// this is a brand new insert
if (opmode==OP_SETCUR) begin
if (opmode==HTOP_SETCUR) begin
writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH] <= {inputValueSize,mallocRegData};
writebackEntry[0 +: KEY_WIDTH] <= inputReg[0 +: KEY_WIDTH];
......@@ -724,7 +717,7 @@ always @(posedge clk) begin
end
OP_DELCUR : begin
HTOP_DELCUR : begin
if (free_ready==1) begin
if (writebackKeyMatch==1) begin
......@@ -749,7 +742,7 @@ always @(posedge clk) begin
end
end
OP_FLIPPOINT : begin
HTOP_FLIPPOINT : begin
if (free_ready==1) begin
if (writebackKeyMatch==1 && writebackEntry[KEY_WIDTH+VALPOINTER_WIDTH +: VALPOINTER_WIDTH]!=0) begin
......@@ -783,7 +776,7 @@ always @(posedge clk) begin
end
OP_FLUSH : begin
HTOP_FLUSH : begin
if (output_ready==1) begin
output_data <= { 16'h0, {VALPOINTER_WIDTH{1'b0}}, inputReg[0 +: KEY_WIDTH+META_WIDTH+USER_BITS]};
output_valid <= 1;
......@@ -800,9 +793,9 @@ always @(posedge clk) begin
ST_SENDOUT : begin
if (output_ready==1) begin
output_data <= {16'h0, {VALPOINTER_WIDTH{1'b0}}, inputReg[0 +: KEY_WIDTH+META_WIDTH+USER_BITS]};
if (opmode==OP_IGNOREPROP) begin
if (opmode==HTOP_IGNOREPROP) begin
output_data[KEY_WIDTH+META_WIDTH+USER_BITS+VALPOINTER_WIDTH +: 16] <= inputValueSize;
output_data[KEY_WIDTH+META_WIDTH-8 +: 4] <= OP_IGNORE;
output_data[KEY_WIDTH+META_WIDTH-8 +: 4] <= HTOP_IGNORE;
end
output_valid <= 1;
state <= ST_IDLE;
......@@ -827,10 +820,10 @@ always @(posedge clk) begin
output_valid <= 1;
if (opmode==OP_SETNEXT) begin
if (opmode==HTOP_SETNEXT) begin
output_data <= {16'h0, writebackEntry[KEY_WIDTH +VALPOINTER_WIDTH +: VALPOINTER_WIDTH], inputReg[0 +: KEY_WIDTH+META_WIDTH+USER_BITS]};
end else begin
if (silent_resp==1 && opmode==OP_FLIPPOINT) begin
if (silent_resp==1 && opmode==HTOP_FLIPPOINT) begin
output_data <= {16'hFFFF, writebackEntry[KEY_WIDTH +: VALPOINTER_WIDTH], inputReg[0 +: KEY_WIDTH+META_WIDTH+USER_BITS]};
end
else begin
......
localparam [7:0]
OPCODE_SETUPPEER = 17,
OPCODE_ADDPEER = 18,
OPCODE_REMOVEPEER = 19,
OPCODE_SETLEADER = 20,
OPCODE_SETCOMMITCNT = 25,
OPCODE_SETSILENCECNT = 26,
OPCODE_SETHTSIZE = 27,
OPCODE_TOGGLEDEAD = 28,
OPCODE_SYNCDRAM = 29,
OPCODE_READREQ = 0,
OPCODE_WRITEREQ = 1,
OPCODE_PROPOSAL = 2,
OPCODE_ACKPROPOSE = 3,
OPCODE_COMMIT = 4,
OPCODE_SYNCREQ = 5,
OPCODE_SYNCRESP = 6,
OPCODE_SYNCCOMMIT = 7,
OPCODE_UNVERSIONEDWRITE = 31,
OPCODE_UNVERSIONEDDELETE = 47,
OPCODE_READCONDITIONAL = 64,
OPCODE_FLUSHDATASTORE = 255,
OPCODE_DELWRITEREQ = 32 + 1,
OPCODE_DELPROPOSAL = 32 + 2,
OPCODE_DELACKPROPOSE = 32 + 3,
OPCODE_CUREPOCH = 8,
OPCODE_NEWEPOCH = 9,
OPCODE_ACKEPOCH = 10,
OPCODE_SYNCLEADER = 11;
localparam [3:0]
HTOP_IGNORE = 0,
HTOP_GET = 1,
HTOP_SETNEXT = 2,
HTOP_DELCUR = 3,
HTOP_FLIPPOINT = 4,
HTOP_SETCUR = 5,
HTOP_GETRAW = 6,
HTOP_IGNOREPROP = 7,
HTOP_GETCOND = 8,
HTOP_FLUSH = 4'hF, //(truncated from 8'hFF)
// these are not supported:
HTOP_SCAN = 9,
HTOP_SCANCOND = 10;
\ No newline at end of file
......@@ -142,9 +142,12 @@ architecture beh of muu_replicate_CentralSM is
constant OPCODE_SYNCRESP : integer := 6;
constant OPCODE_SYNCCOMMIT : integer := 7;
constant OPCODE_UNVERSIONEDWRITE : integer := 31;
constant OPCODE_UNVERSIONEDWRITE : integer := 31;
constant OPCODE_UNVERSIONEDDELETE : integer := 47;
constant OPCODE_FLUSHDATASTORE : integer := 255;
constant OPCODE_READCONDITIONAL : integer := 64;
constant OPCODE_FLUSHDATASTORE : integer := 255;
constant OPCODE_DELWRITEREQ : integer := 32 + 1;
constant OPCODE_DELPROPOSAL : integer := 32 + 2;
......@@ -163,6 +166,11 @@ architecture beh of muu_replicate_CentralSM is
constant HTOP_SETCUR : integer := 5;
constant HTOP_GETRAW : integer := 6;
constant HTOP_IGNOREPROP : integer := 7;
constant HTOP_GETCOND : integer := 8;
constant HTOP_FLUSH : integer := 16;
constant HTOP_SCAN : integer := 9;
constant HTOP_SCANCOND : integer := 10;
--type Array16Large is array(2**MAX_OUTSTANDING_REQS_BITS-1 downto 0) of std_logic_vector(15 downto 0);
......@@ -622,6 +630,10 @@ begin
when (OPCODE_UNVERSIONEDWRITE) =>
myState <= ST_HANDLEOP;
inCmdReady <= '0';
when (OPCODE_UNVERSIONEDDELETE) =>
myState <= ST_HANDLEOP;
inCmdReady <= '0';
when (OPCODE_ACKPROPOSE) =>
traceLoc <= "00001000";
......@@ -882,7 +894,7 @@ begin
when others =>
error_opcode <= inCmdOpCode_I;
if (inCmdOpCode_I /= OPCODE_READREQ and inCmdOpCode /= OPCODE_FLUSHDATASTORE) then
if (inCmdOpCode_I /= OPCODE_READREQ and inCmdOpCode_I /= OPCODE_FLUSHDATASTORE and inCmdOpCode_I/=OPCODE_READCONDITIONAL) then
error_valid <= '1';
end if;
......@@ -897,6 +909,10 @@ begin
cmd_out_data(CMD_HTOP_LOC + CMD_HTOP_LEN - 1 downto CMD_HTOP_LOC) <= std_logic_vector(conv_unsigned(HTOP_GET, CMD_HTOP_LEN));
end if;
if (inCmdOpCode_I = OPCODE_READCONDITIONAL) then
cmd_out_data(CMD_HTOP_LOC + CMD_HTOP_LEN - 1 downto CMD_HTOP_LOC) <= std_logic_vector(conv_unsigned(HTOP_GETCOND, CMD_HTOP_LEN));
end if;
myState <= ST_WAITOUTREADY;
end if;
......@@ -1088,6 +1104,21 @@ begin
end if;
when (OPCODE_UNVERSIONEDDELETE) =>
if (cmd_out_ready = '1') then
cmd_out_data <= inCmdAllData;
cmd_out_key <= inCmdKey;
cmd_out_user <= inCmdUser;
cmd_out_valid <= '1';
inCmdReady <= '0';
cmd_out_data(CMD_HTOP_LOC + CMD_HTOP_LEN - 1 downto CMD_HTOP_LOC) <= std_logic_vector(conv_unsigned(HTOP_DELCUR, CMD_HTOP_LEN));
myState <= ST_WAITOP;
inCmdReady <= '1';
end if;
when (OPCODE_PROPOSAL) =>
if (cmd_out_ready = '1' and malloc_ready = '1') then
log_add_valid <= '1';
......@@ -1464,6 +1495,8 @@ begin
cmd_out_valid <= '1';
--cmd_out_data(CMD_PAYLSIZE_LOC+CMD_PAYLSIZE_LEN-1 downto CMD_PAYLSIZE_LOC) <= log_found_size;
--decided whether RESPONSE IS SILENT in the WRITE modules
cmd_out_data(CMD_TYPE_LEN + CMD_TYPE_LOC - 1 downto CMD_TYPE_LOC) <= (others => '0');
if (myRole(conv_integer(inCmdUser)) = ROLE_FOLLOWER) then
cmd_out_data(CMD_TYPE_LEN + CMD_TYPE_LOC - 1) <= '1';
......
......@@ -15,7 +15,6 @@
//-- along with this program. If not, see <http://www.gnu.org/licenses/>.
//---------------------------------------------------------------------------
module muu_RequestSplit #(
parameter NET_META_WIDTH = 64,
parameter VALUE_WIDTH = 512,
......@@ -52,6 +51,8 @@ module muu_RequestSplit #(
output reg [3:0] _debug
);
`include "muu_ops.vh"
reg ERRCHECK = 1;
......@@ -130,22 +131,16 @@ always @ (posedge clk)
if (s_axis_tvalid==1 && readyfornew==1) begin
// outputs are clear, let's figure out what operation is this
if (ERRCHECK==1 && s_axis_tdata[15:0]!=16'hFFFF) begin
_debug[1:0] <= 1;
end
if (ERRCHECK==1 && (opcode_i<8'hFF && opcode>8'h24)) begin
_debug[1:0] <= 3;
end
if (ERRCHECK==1 && s_axis_tdata[16 +: 8]>8'h05) begin
_debug[1:0] <= 3;
end
opcode <= opcode_i;
if (opcode_i == 2 || opcode_i == 1 || opcode_i==8'hFF || opcode_i == 0 || opcode_i == 31) begin
if (opcode_i == OPCODE_PROPOSAL
|| opcode_i == OPCODE_WRITEREQ
|| opcode_i==OPCODE_FLUSHDATASTORE
|| opcode_i == OPCODE_READREQ
|| opcode_i == OPCODE_UNVERSIONEDWRITE
|| opcode_i == OPCODE_UNVERSIONEDDELETE
|| opcode_i == OPCODE_READCONDITIONAL
) begin
keylen <= 8'd1;
end else begin
keylen <= 8'd0;
......
......@@ -27,11 +27,10 @@ module muu_Top_Module_Repl #(
parameter KEY_WIDTH = 64,
parameter HASHTABLE_MEM_SIZE = 20,
parameter VALUESTORE_MEM_SIZE = 24,
parameter SUPPORT_SCANS = 0,
parameter DECOMPRESS_ENGINES = 0,
parameter EXTRA_PRED_EVALS = 7,
parameter FILTER_PRED_CNT = 8,
parameter FILTER_REGEX_PARA = 0,
parameter IS_SIM = 0,
parameter USER_BITS = 4
parameter USER_BITS = 3
)(
// Clock
input wire clk,
......@@ -147,6 +146,10 @@ parameter EXT_META_WIDTH = NET_META_WIDTH+OPS_META_WIDTH+USER_BITS;//163
parameter DOUBLEHASH_WIDTH = 64;
parameter HASH_WIDTH = 32;
parameter SUPPORT_SCANS = 0;
parameter FILTER_ENABLED_NUM = FILTER_REGEX_PARA + FILTER_PRED_CNT;
wire [31:0] rdcmd_data;
wire rdcmd_valid;
wire rdcmd_stall;
......@@ -306,7 +309,6 @@ wire value_b_ready;
wire[VALUE_WIDTH-1:0] value_read_data;
wire value_read_valid;
wire value_read_last;
wire value_read_ready;
......@@ -351,13 +353,6 @@ wire pe_cmd_valid;
wire[15:0] pe_cmd_data;
wire[95:0] pe_cmd_meta;
wire [511:0] value_frompred_data;
wire value_frompred_ready;
wire value_frompred_valid;
wire value_frompred_drop;
wire value_frompred_last;
wire [511:0] value_frompipe_data;
wire value_frompipe_ready;
wire value_frompipe_valid;
......@@ -601,7 +596,8 @@ wire [3:0] reqsplit_debug;
muu_RequestSplit #(
.NET_META_WIDTH(NET_META_WIDTH),
.OPS_META_WIDTH(OPS_META_WIDTH)
.OPS_META_WIDTH(OPS_META_WIDTH),
.USER_BITS(USER_BITS)
) splitter (
.clk(clk),
.rst(rst),
......@@ -1353,47 +1349,12 @@ nukv_Malloc #(
);
assign scan_mode_on = 0;
/*
always @(posedge clk) begin
if (SUPPORT_SCANS==1) begin
if (rst) begin
scan_mode_on <= 0;
scan_readsprocessed <= 0;
end
else begin
if (scan_mode_on==0 && scan_reading==1) begin
scan_mode_on <= 1;
scan_readsprocessed <= 0;
end
if (scan_mode_on==1 && value_frompred_b_valid==1 && value_frompred_b_ready==1) begin
scan_readsprocessed <= scan_readsprocessed +1;
end
if (scan_mode_on==1 && scan_reading==0 && scan_readsprocessed==scan_readsissued && scan_readsissued > 0) begin
scan_mode_on <= 0;
end
end
end else begin
scan_mode_on <= 0;
end
end
assign scan_ready = scan_rdcmd_ready;
assign scan_rdcmd_valid = scan_valid;
assign scan_rdcmd_data = {scan_cnt, scan_addr};
*/
assign b_rdcmd_data ={24'b000000000000000100000001, b_rdcmd_cnt[7:0], 4'b0000, b_rdcmd_data_short[27:0]};
assign b_wrcmd_data ={24'b000000000000000100000001, 8'b00000001, 4'b0000, b_wrcmd_data_short[27:0]};
assign p_rdcmd_data ={24'b000000000000000100000001, 8'b00000001, 4'b0000, p_rdcmd_data_short[27:0]};
assign p_wrcmd_data ={24'b000000000000000100000001, 8'b00000001, 4'b0000, p_wrcmd_data_short[27:0]};
assign ht_rd_cmd_data ={24'b000000000000000100000001, 8'b00000001, 4'b0000, 4'b0000, rdcmd_data[23:0]};
assign ht_rd_cmd_valid = rdcmd_valid;
assign rdcmd_ready = ~ht_rd_cmd_stall;
......@@ -1533,7 +1494,7 @@ muu_Value_Set #(
.pe_valid(predconf_valid),
.pe_scan(predconf_scan),
.pe_ready(predconf_ready & predevalpipe_ready),
.pe_ready(predconf_ready),
.pe_data(predconf_data),
.scan_start(scan_kickoff),
......@@ -1550,6 +1511,22 @@ muu_Value_Set #(
);
nukv_fifogen #(
.DATA_SIZE(MEMORY_WIDTH+NET_META_WIDTH+1),
.ADDR_BITS(7)
) fifo_output_conf_pe (
.clk(clk),
.rst(rst),
.s_axis_tdata({predconf_data, predconf_scan}),
.s_axis_tvalid(predconf_valid),
.s_axis_tready(predconf_ready),
.m_axis_tdata(predconf_b_fulldata),
.m_axis_tvalid(predconf_b_valid),
.m_axis_tready(predconf_b_ready)
);
muu_DataRepeater data_replicator (
.clk(clk),
.rst(rst),
......@@ -1677,250 +1654,98 @@ nukv_fifogen #(
.m_axis_tready(fromset_b_ready)
);
wire cond_valid;
wire cond_ready;
wire cond_drop;
/*
nukv_fifogen #(
.DATA_SIZE(48+NET_META_WIDTH+1),
.ADDR_BITS(7)
) fifo_output_conf_pe (
.clk(clk),
.rst(rst),
.s_axis_tdata({predconf_data, predconf_scan}),
.s_axis_tvalid(predconf_valid & predconf_ready & predevalpipe_ready),
.s_axis_tready(predconf_ready),
.m_axis_tdata(predconf_b_fulldata),
.m_axis_tvalid(predconf_b_valid),
.m_axis_tready(predconf_b_ready)
);
assign predconf_b_scan = predconf_b_fulldata[0];
assign predconf_b_data = {predconf_b_fulldata[1+NET_META_WIDTH +: 48],predconf_b_fulldata[1 +: NET_META_WIDTH]};
wire pred_eval_error;
*/
/*
wire[511:0] decompress_in_data;
wire[DECOMPRESS_ENGINES-1:0] decompress_in_valid;
wire[DECOMPRESS_ENGINES-1:0] decompress_in_ready;
wire[511:0] decompress_out_data[0:DECOMPRESS_ENGINES-1];
wire[DECOMPRESS_ENGINES-1:0] decompress_out_valid;
wire[DECOMPRESS_ENGINES-1:0] decompress_out_ready;
wire[DECOMPRESS_ENGINES-1:0] decompress_out_last;
wire[511:0] decompress_comb_data[0:DECOMPRESS_ENGINES-1];
wire[DECOMPRESS_ENGINES-1:0] decompress_comb_valid;
wire[DECOMPRESS_ENGINES-1:0] decompress_comb_last;
reg[5:0] decompress_in_rrid;
reg[5:0] decompress_out_rrid;
reg rst_buf;
assign value_read_ready_buf = decompress_in_ready[decompress_in_rrid];
assign decompress_in_data = value_read_data_buf;